The present invention relates to a photoelectric conversion device having a plurality of photoelectric conversion elements and, more particularly, to a photoelectric conversion device capable of improving linearity of the photoelectric conversion, further, widening a dynamic range by utilizing characteristics of transistors used for outputting signals corresponding to charges generated by photoelectric conversion elements and characteristics of metal-oxide semiconductor (MOS) transistor switches, thereby improving signal/noise (S/N) ratio.
Conventionally, in a solid-state image sensing device, charge-coupled-device (CCD) type photoelectric conversion elements are used in most cases; however, MOS type photoelectric conversion elements have been recently developed for commercial products. It has been said that a MOS type photoelectric conversion device provide an image of inferior quality compared to an image sensed by a CCD type photoelectric conversion device. However, if noise is reduced, there are advantages in the MOS type photoelectric conversion device in that it is possible to drive the MOS type photoelectric conversion device by the same power source with lower energy compared to the CCD type photoelectric conversion device, and photo-receiving unit and its peripheral circuits are manufactured in the same MOS manufacturing processes, thus it is easier to integrate the photo-receiving unit and the peripheral circuits. Accordingly, these merits of the MOS type photoelectric conversion device start attracting attentions recently. Currently, it is possible to reduce random noise and fixed noise for improving quality of an image provided by the MOS type photoelectric conversion device, and there is a new demand for widening the dynamic range of each MOS type photoelectric conversion element in order to obtain image signals of a higher S/N ratio.
Note, in the following explanation, a MOS type a photoelectric conversion element and a MOS type photoelectric conversion device are simply referred to as a photoelectric conversion element and a photoelectric conversion device.
FIG. 1 is a circuit diagram illustrating a brief configuration of a conventional photoelectric conversion device. In FIG. 1, photoelectric conversion elements 1 (e.g., photodiodes), arranged in two dimensions, generate charges corresponding to the received quantity of light. In FIG. 1, only 16 (=4xc3x974) photoelectric conversion elements are shown for the sake of illustrative convenience, however, a large number of photoelectric conversion elements are usually used in practice. One end of each photoelectric conversion element is connected to the gate of a MOS transistor 2; the drain of the MOS transistor 2 is connected to the source of a MOS transistor 3 which configures a row selection switch, and the source of the MOS transistor 2 is connected to a constant current source 7 via a vertical output line 6; and the drain of each MOS transistor 3 is connected to a power supply terminal 5 via a power supply line 4. The foregoing elements collectively form the source follower. Reference 14 denotes a MOS transistor configuring a reset switch, and its source is connected to the gate of the MOS transistor 2 and its drain is connected to the power supply terminal 5 via the power supply line 4.
In this circuit, a signal corresponding to the gate voltage of the MOS transistor 2 which changes depending upon charge generated by the photoelectric conversion element 1 of each pixel, is amplified and outputted by the source follower which performs current amplification.
The gate of each MOS transistor 3 is connected to a vertical scanning circuit 9 via a vertical gate line 8. The gate of each reset switch 14 is also connected to the vertical scanning circuit 9 via a reset gate line 15. Further, an output signal from the source follower is outputted via the vertical output line 6, a MOS transistor 10 which configures a switch for horizontal transference, a horizontal output line 11, and an output amplifier 12. The gate of each MOS transistor 10 is connected to a horizontal scanning circuit 13.
An operation of this circuit is as follows. First, the photoelectric conversion elements 1 are reset by the reset switches 14, thereafter, charges are stored. Note, since the photoelectric conversion elements 1 generate electrons depending upon the amount of light received, the gates of the MOS transistor 2 are charged to a reset potential during the reset operation, and the potentials at the gates of the MOS transistors 2 drop in response to the generation of the electrons. Accordingly, a potential corresponding to the generated charges appears at the gate of each MOS transistor 2. After the charging period is over, a signal of a pixel selected by the vertical scanning circuit 9 and the horizontal scanning circuit 13 is amplified by the source follower, and outputted via the output amplifier 12.
In the above configuration, since the source follower and the reset switch 14 share the same power supply line 4, it is possible to down-size the circuit.
Further, by arranging the row selection switch 3 on the side of the power supply with respect to the MOS transistor 2, impedance of the selection switch 3 does not exist between the source of the MOS transistor 2 and the constant current source 7; accordingly, an output of good linearity is obtained from the source follower.
Below, output characteristics of the source follower as described above is explained.
In order to simplify the explanation, one photoelectric conversion element 1 and its peripheral circuit corresponding to a single pixel are shown in FIG. 2. In FIG. 2, the same elements as those shown in FIG. 1 are referred to by the same reference numerals. Generally, for the source follower to operate linearly, i.e., to output a voltage in proportion to an input voltage, a MOS transistor, forming the source follower, needs to operate in the saturation region; thus, the following condition should be satisfied.
Vds greater than Vgsxe2x88x92Vthxe2x80x83xe2x80x83(1)
where Vds is the voltage difference between the drain and the source, Vgs is the voltage difference between the gate and the source, and Vth is a threshold voltage.
In a case of the source follower having a configuration as shown in FIG. 2, let the ON-state impedance of the row selection switch 3 be Ron, and current flowing through the source follower be Ia, then the drain voltage of the MOS transistor 2 is
Power supply voltagexe2x88x92Ronxc3x97Iaxe2x80x83xe2x80x83(2)
due to a voltage drop in the row selection switch 3. Accordingly, Vds in the equation (1) decreases, thereby a region for the source follower to operate linearly (calledxe2x80x9clinear operation regionxe2x80x9d hereinafter) is narrowed. As a result, the source follower does not operate within the linear operation region for every voltage, applied to the gate of the MOS 2, which depends upon the charge generated by the photoelectric conversion element 1, and the following two problems arise:
(a) Input-output linearity in low luminosity region deteriorates.
(b) Saturation voltage becomes small, thus the dynamic range is narrowed.
Further, when the current flowing through the source follower is reduced in order to reduce the voltage drop in the row selection switch 3, it takes considerable time to charge a capacitance with a small current. Accordingly, it takes a considerable time to transfer signals, thus the number of pixels in the photoelectric conversion device is limited when charges should be transferred in a predetermined period. Consequently, the conventional circuit is not suitable for operating a great number of pixels.
Another example of a conventional photoelectric conversion device is explained below.
FIG. 3 is a circuit diagram illustrating a brief configuration of a conventional CMOS area sensor. In FIG. 3, a two-dimensional area sensor having 2xc3x972 pixels is shown, however, the number of pixels is not limited to this.
The circuit corresponding to each pixel of the area sensor shown in FIG. 3 is explained. In each pixel, a photodiode 901, a MOS transistor 911 as a transfer switch, a MOS transistor 902 as a reset switch, a MOS transistor 903 as an amplifier, and a MOS transistor 904 as a row selection switch are provided. The gate of the transfer switch 911 is connected to a line which is driven by a signal "PHgr"TX(n, n+1) by a vertical scanning circuit 910, the gate of the reset switch 902 is connected to a line which is driven by a signal "PHgr"RES(n, n+1) by the vertical scanning circuit 910, and the gate of the row selection switch 904 is connected to a line which is driven by a signal "PHgr"SEL(n, n+1) by the vertical scanning circuit 910.
Photoelectric conversion is performed in each photodiode 901, and while generating the photo-charge, the transfer switch 911 is in the OFF state and the photo-charge is not transferred to the gate of the amplifier 903. The gate of the MOS transistor 903 is initialized to a predetermined voltage by turning on the reset switch 902 before the photo-charge is transferred. The predetermined voltage is a dark level. Thereafter or at the same time, the row selection switch 904 is turned on, and the source follower, configured with a constant current source 905 and the amplifier (MOS transistor) 903, starts operating. After or at the same time the row selection switch 904 is turned on, the transfer switch 911 is turned on, thereby the charge generated by the photodiode 901 is transferred to the gate of the amplifier 903.
Accordingly, outputs of the selected row are transferred to vertical output lines 906. The outputs are then stored in a signal storage unit 907 via MOS transistors 909a and 909b which work as transfer gates. The outputs, temporarily stored in the signal storage unit 907, are sequentially outputted as V0 under control of a horizontal scanning circuit 908.
FIG. 4 is a timing chart for operating the CMOS area sensor shown in FIG. 3. During a period T1, signals "PHgr"TX(n) and "PHgr"TX(n+1) become active, and charges generated by the photodiodes 901 of all the pixels are transferred to the gates of the MOS transistors 903 via the transfer switches 911, thereby the photodiodes 901 are reset. In this state, a part of the charges in the cathodes of the photodiodes 901 are transferred to the gates of the MOS transistors 903 and the voltages of the cathodes and the gates become the same level. By using the capacitor CFD 913 of a large capacitance connected to the gate of the MOS transistor 903, potential of the MOS transistor 903 becomes the same level as that of the cathode of the photodiode 901 when it is reset.
During the period T1, a mechanical shutter (not shown) is open for letting in light from an object; therefore, right after the period T1 is over, a charging process starts in every pixel simultaneously. The mechanical shutter is kept open during a period T3, and this period is a charging period of the photodiodes 901.
After the period T3 is over, the mechanical shutter closes at time T4, thereby the charging process of the photodiodes 901 completes. In this state, photo-charges are stored in the photodiodes 901. Next, the stored photo-charges start being read by row.
First, during a period T5, the signal "PHgr"SEL(n) becomes active, thereby the row selection switches 904 in the n-th row are turned on. In this state, the source followers, each of which includes the MOS transistor 903 of the pixel in the n-th row, become active. Then, the signal "PHgr"RES(n) becomes active in a period T2, and the reset switches 902 in the n-th row are turned on, thereby the gates of the MOS transistors 903 are initialized. Accordingly, signals of dark level are outputted to the vertical output lines 906.
Next, the signal "PHgr"TN(n) becomes active, and the transfer gates 909b are turned on, and the signals of dark level are stored in the signal storage unit 907. The aforesaid operation is simultaneously performed for all the pixels in the n-th row. When finishing transferring the signals of dark level to the signal storage unit 907, the signal "PHgr"TX(n) becomes active, and the transfer switches 911 in the n-th row are turned on. Accordingly, the photo-charges stored in the photodiodes 901 in the n-th row are transferred to the gates of the MOS transistors 903. At this time, potential at the gate of each MOS transistor 903 changes from the dark level, or the reset level, by an amount of the transferred charge, and a signal of a level corresponding to the changed potential is outputted to the vertical output line 906.
Then, the signal "PHgr"TS becomes active, the transfer gates 909a are turned on, and the signals on the vertical output lines 906 (the levels of these signals are referred to as xe2x80x9csignal levelxe2x80x9d hereinafter) are stored in the signal storage unit 907. This operation is simultaneously performed for all the pixels in the n-th row. In this state, the signal storage unit 907 stores the dark levels and the signal levels of all the pixels in the n-th row, thus, by taking the difference between the dark level and the signal level of each pixel, fixed pattern noise caused by variation in threshold voltage Vth between the MOS transistors 903 and thermal noise (KTC noise) generated when resetting the MOS transistors 903 by the reset switches 902 are canceled. Accordingly, it is possible to obtain high S/N signals from which noise components are reduced.
Then, the difference signals, stored in the signal storage unit 907, between the dark levels and the signal levels are read out horizontally under control of the horizontal scanning circuit 908 during the period T7 time-serially. Thus, the output operation of the signals in the n-th row is completed.
Similarly, by driving signals "PHgr"SEL(n+1), "PHgr"RES(n+1), "PHgr"TX(n+1), "PHgr"TX(n+1), "PHgr"TN, and "PHgr"TS in the same manner as those for the n-th row, signals in the (n+1)-th row are read out.
In the above conventional example, since the differences between the dark-levels and the signal levels are outputted, a high S/N ratio is realized, thereby high-quality image signals are obtained. Further, the solid state image sensing elements of the above configuration are formed in processes of forming CMOS transistors, therefore, it is possible to integrate the image sensing elements and the peripheral circuits on one chip. Accordingly, manufacturing cost is reduced and high performance is realized.
However, although the noise components are reduced, if the dynamic range of an element for reading photo-charge is narrow, the S/N ratio can not be further improved.
As for an input dynamic range of the element for reading photo-charge, from a graph shown in FIG. 5, the maximum input level, VG(FD)max, is,
VG(FD)max=VG(RES)xe2x88x92Vth(RES)xe2x80x83xe2x80x83(3)
where VG(RES) is the potential at the gate of the reset switch 902, and Vth(RES) is the threshold voltage of the reset switch 902. Thus, the maximum input level VG(FD)max is the difference between the signal level "PHgr"RES(n), applied to the gate of the reset switch 902, and the threshold voltage between the gate and source of the reset switch 902. Further, the minimum input level, VG(FD)min, is,
VG(FD)min=VG(TX)xe2x88x92Vth(TX)xe2x80x83xe2x80x83(4)
where VG(TX) is the potential at the gate of the transfer switch 911, and Vth(TX) is the threshold voltage of the transfer switch 911. Thus, the minimum input level VG(FD)min is the difference between the signal level "PHgr"TX(n), applied at the gate of the reset switch 911, and a threshold voltage between the gate and source of the transfer switch 911.
Accordingly, the input dynamic range, Dy, is,
Dy=VG(FD)maxxe2x88x92VG(FD)min=VG(RES)xe2x88x92VG(TX)+Vth(TX)xe2x88x92Vth(RES)xe2x80x83xe2x80x83(5)
In equation (5) of the input dynamic range Dy, Vth(TX) and Vth(RES) of the MOS transistors differ, one from the other, since there are variations in the manufactured MOS transistors. This makes the input dynamic range Dy unstable.
The photoelectric conversion device will be applied to devices which require a higher resolution (more pixels) and lower energy consumption (lower voltage), such as a digital still camera and a video camcorder, in the future. However, the conventional circuit can not meet the aforesaid demands of high resolution (more pixels), which causes an increase in driving load, and of low energy consumption (lower voltage), which causes deterioration of dynamic range.
The present invention has been made in consideration of the above situation, and has as its object to provide a photoelectric conversion device having good input-output linearity.
According to the present invention, the foregoing object is attained by providing a photoelectric conversion device having a plurality of pixel cells each of which includes a photoelectric conversion element, a field effect transistor having the gate area for storing signal charge generated by the photoelectric conversion element and the source-drain path for outputting a signal corresponding to the signal charge stored in the gate, a first power supply line for supplying electric power to the field effect transistor, and a first switch connected between the field effect transistor and the first power supply line, the device is characterized in that, when a reset voltage for resetting the gate of the field effect transistor is Vsig0, a threshold voltage of the field effect transistor is Vth, current flowing through the field effect transistor is Ia, a voltage applied via the first power supply line is Vc1, and a series resistance of the first switch is Ron, each pixel cell satisfies a condition determined by Vc1xe2x88x92Ronxc3x97Ia greater than Vsig0xe2x88x92Vth.
It is another object of the present invention to provide a photoelectric conversion device capable of realizing good input-output linearity as well as widening dynamic range.
According to the present invention, the foregoing object is attained by providing the above photoelectric conversion device in which each of the pixel cells further comprises a second switch for resetting the gate area of the field effect transistor, and the first switch and the second switch are field effect transistors having different threshold voltages from each other.
According to the present invention, the foregoing object is also attained by providing a photoelectric conversion device having a plurality of pixel cells each of which includes a photoelectric conversion element, a first switch for transferring charge generated by the photoelectric conversion element, a field effect transistor, having the gate area for receiving the transferred charge, for outputting a signal corresponding to the charge stored in the gate area, and a second switch for resetting the gate area of the field effect transistor, the device is characterized in that threshold voltages of the first switch and the second are made different from a threshold voltage of the field effect transistor.
Further, it is another object of the present invention to reduce a variation in dynamic range in addition to the foregoing objects.
According to the present invention, the foregoing object is attained by providing the aforesaid photoelectric conversion device in which the threshold voltage of the field effect transistor for outputting a signal is made different from the threshold voltages of the first switch and the second switch by doping all the channel regions of the field effect transistor for outputting a signal, the first switch, and the second switch with dopant of a predetermined impurity concentration, first, then further doping a channel region of the field effect transistor for outputting a signal.